Sparsa Roychowdhury

Contact

@: name dot surname at intel dot com
Address: Formal Verification Central Tech Office (FVCTO), Intel India Pvt. Limited
SRR 3
Intel SRR office
Bengaluru 560103,
Karnataka, India.

Timeline:

...

  • Formal Verification Engineer, FVCTO, Intel India
    • April, 2022
  • Ph.D. in Computer Science
    Indian Institue of Technology, Bombay, India
    Advisors: Akshay S. , Krishna S.,IIT Bombay
    • January, 2016
  • Project Linked Person, CVPR, ISI, Kolkata
    Advisor: Bidyut Baran Chaudhuri
    • July, 2015
  • M.E. in Computer Science and Engineering
    Indian Institute of Engineering Science and Technology, Shipbur, Howrah, India
    • July, 2013
  • B.Tech. in Information Technology
    RCC Institute of Information Technology, West Bengal University of Technology
    • July, 2009

    Internship:

      July, 2019
    • Mathworks, Bengaluru
      • May, 2019

    About:

    I am working as a Formal Verification Engineer at Intel. I am interested in developing techniques and methodologies to formally verify hardware and software. I completed my Ph.D. from the Department of Computer Science, IIT Bombay under the supervision of Prof. Akshay S. and Prof. Krishna S.

    Awards:

    • TCS Fellowship awardee(cycle 13)

    Research Interests:

    Projects:

    BHIM: A tool to decide under-approximate reachability of multi-stack pushdown systems.

    Publications:

    1. S. Akshay, Paul Gastin, Krishna S, Sparsa Roychowdhury Revisiting Underapproximate Reachability for Multipushdown Systems TACAS'20
    2. Sparsa Roychowdhury 1½-Player Stochastic StopWatch Games TIME'21
    3. S. Akshay, Blaise Genest, Loïc Hélouët, Krishna S and Sparsa Roychowdhury Resilience of Timed Systems FSTTCS'21